AD2S1210 Driver register map

Register Name	Register offset	Field name	Field position	Description
TARGET_CFG_0	0x0	value	31:0	LOS threshold register value
TARGET_CFG_1	0x4	value	31:0	DOS overrange threshold register value
TARGET_CFG_2	0x8	value	31:0	DOS mismatch threshold register value
TARGET_CFG_3	0xC	value	31:0	DOS reset maximum threshold register value
TARGET_CFG_4	0x10	value	31:0	DOS reset minimum threshold register value
TARGET_CFG_5	0x14	value	31:0	LOT high threshold register value
TARGET_CFG_6	0x18	value	31:0	LOT low threshold register value
TARGET_CFG_7	0x1C	value	31:0	Excitation frequency register value
TARGET_CFG_8	0x20	value	31:0	Control register value
START	0x24	mode	0	Start configuration when mode is 0 clear fault when 1
CONTROL	0x28	resolution	3:2	RDC converter resolution setting
		rdc_reset	4	reset the RDC converter
		sample_pulse_length	15:8	Length in clock cycles of the sample pulse
		sample_read_delay	23:16	delay between the sample pulse and the data read
		spi_transfer_length	28:24	Length of the output spi transfer