ADC processing register mapΒΆ
Register Name |
Register offset |
Field name |
Field position |
Description |
---|---|---|---|---|
COMPARATOR_THRESHOLD_1 |
0x0 |
fast_treshold |
15:0 |
Fast comparator low/low falling treshold |
slow_treshold |
31:16 |
Slow comparator low/low falling treshold |
||
COMPARATOR_THRESHOLD_2 |
0x4 |
fast_treshold |
15:0 |
Fast comparator low rising treshold |
slow_treshold |
31:16 |
Slow comparator low rising treshold |
||
COMPARATOR_THRESHOLD_3 |
0x8 |
fast_treshold |
15:0 |
Fast comparator high falling treshold |
slow_treshold |
31:16 |
Slow comparator high falling treshold |
||
COMPARATOR_THRESHOLD_4 |
0x10 |
fast_treshold |
15:0 |
Fast comparator high/high rising treshold |
slow_treshold |
31:16 |
Slow comparator high/high rising treshold |
||
CALIBRATION |
0x14 |
reserved |
15:0 |
reserved |
offset |
31:16 |
Additive offset calibration |
||
CONTROL |
0x18 |
filter_bypass |
0 |
Bypass decimation |
latch_mode |
2:1 |
comparator latching mode/self toggle |
||
clear_latch |
3 |
reset comparators in latching mode |
||
cal_data_shift |
7:5 |
post calibration data right shift coefficient |
||
slow_fault_duration |
15:8 |
Number of cycles of high slow comparator output required to trigger a fault |
||
clear_fault |
16 |
Clear fault latch |
||
disable_fault |
17 |
Disable the fault mechanism |
||
decimation_ratio |
31:24 |
Decimation ratio |